Rambus Invited to Demonstrate and Present Innovations for Future Main Memory at ISSCC 2013
International Solid-State Circuit Conference
Marriott Marquis Hotel
San Francisco, CA
February 20, 2013 at 8:30 a.m.
Rambus engineers will demonstrate and present innovations for future main memory systems at the 2013 International Solid-State Circuit Conference (ISSCC), the premier forum for showcasing advances in solid-state circuits.
The presentation will highlight a single-ended, low-signal swing transceiver that couples high-speed (up to 6.4Gb/s) read/write capabilities with industry leading power efficiency. This technology can satisfy the demand for high-density, low power and high-speed memory interfaces in cloud computing environments.
Demonstration Session Details:
Title: A 6.4Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems
8:30 a.m. - 9:00 a.m.
For additional details, visit: www.rambus.com.
KEYWORDS: United States North America California
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