Open-Silicon Improves Test Quality with Mentor Graphics Tessent Cell-Aware Test

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Open-Silicon Improves Test Quality with Mentor Graphics Tessent Cell-Aware Test

WILSONVILLE, Ore.--(BUSINESS WIRE)-- Mentor Graphics Corp. (NAS: MENT) today announced that ASIC design company Open-Silicon has used the Tessent® TestKompress® product with Cell-Aware Test to improve test quality of SoC designs. By using the Tessent TestKompress product, Open-Silicon succeeded in detecting and resolving defects previously undetected using traditional techniques. Open-Silicon has also deployed the Tessent MemoryBIST product for at-speed testing, diagnosis, and repair of embedded memories.

"As our customers move to smaller process nodes and larger SoC designs, the challenge of detecting subtle defects becomes more complex," said Taher Madraswala, senior vice president of engineering for Open-Silicon. "To meet the demand for very low DPM, we need tests that not only detect defects at the standard-cell boundaries, but also capture defects within the cell. The Tessent Cell-Aware Test solution gives us this capability without increasing our test cost significantly."


Cell-Aware Test is a transistor-level test methodology that overcomes the limits of traditional stuck-at and transition fault models and associated test patterns by targeting specific shorts, opens, and transistor defects internal to each standard cell, resulting in significant reductions in defect (DPM) levels.

Open-Silicon provides its customers with fully tested parts, and the Mentor® Cell-Aware Test capability and the Tessent MemoryBIST solution enhance their ability to provide more reliable silicon to their customers. Open-Silicon has used the Tessent TestKompress Cell-Aware Test capability to detect cell-internal defects that were not detected using traditional silicon test methods, which successfully reduced their defective parts-per-million (DPM). They plan to deploy this solution to meet the needs of customers who are DPM sensitive.

"Cell-Aware Test is proving its value to companies like Open-Silicon who need to reduce DPM levels" said Steve Pateras, product marketing director at Mentor Graphics. "We are continuously enhancing our Tessent DFT solutions to achieve the highest test quality while reducing test development effort and production test cost."

About Mentor Graphics

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of nearly $1,090 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

(Mentor Graphics, Mentor, Tessent and TestKompress are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)



Mentor Graphics
Gene Forte, 503-685-1193
gene_forte@mentor.com
or
Mentor Graphics
Sonia Harrison, 503-685-1165
sonia_harrison@mentor.com

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